Cadence Announces Availability of UltraLink D2D PHY IP on TSMC N7, N6 and N5 Processes
25 August 2020 - 12:45AM
Business Wire
NRZ-based die-to-die connectivity IP addressing
cost-effective, multi-chip applications supports organic substrate
packaging
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the
availability of its silicon-proven Cadence® UltraLink™ D2D PHY IP
on the TSMC N7 process. Test silicon on the TSMC N7 process with
full silicon characterization data is now available, an important
milestone for very high-speed, advanced IP. Extensive silicon
validation is necessary to guarantee design margins, performance
across all process corners, bit-error rate (BER), insertion loss
and maximum transmission speed. For the N6 process,
re-characterized silicon data is available. Cadence is ready to
engage with customers now with its UltraLink D2D PHY IP on the TSMC
N7 and N6 processes. Cadence also recently taped out its UltraLink
D2D IP on the TSMC N5 process and is now working with early adopter
customers ahead of anticipated test silicon availability later this
year.
System advances in accelerated computing platforms such as CPUs,
GPUs and FPGAs, heterogeneous systems on chip (SoCs) for AI
acceleration and high-speed networking/interconnects have all
pushed chip integration to unprecedented levels. This requires more
complex designs, larger die sizes and rapid adoption of the most
advanced geometries. In order to manage the economics of advanced
silicon and the ever-increasing monolithic die size, die-to-die
connectivity has become increasingly important as multi-die designs
using advanced packaging have become quite common.
“We’re pleased to see the result of our latest collaboration
with Cadence in delivering Cadence’s D2D PHY IP across several TSMC
advanced processes,” said Suk Lee, senior director of the Design
Infrastructure Management Division at TSMC. “This joint effort
combining Cadence’s leading-edge SerDes IP and TSMC’s advanced
process technologies helps our customers unleash their silicon
innovations for emerging cloud computing, AI, 5G and hyperscale
data center applications.”
“To help our mutual customers achieve success in advanced SoC
designs for cloud computing applications, we’ve enabled our
UltraLink D2D PHY IP in multiple TSMC advanced processes: First in
N7 and N6, with a quick follow-on with N5 later this year,” said
Rishi Chugh, vice president of product marketing, IP Group at
Cadence. “To address our customers’ rapidly evolving requirements,
we continue to invest in both PAM4 and NRZ SerDes IP. The UltraLink
D2D PHY IP is a critical technology delivering high bandwidth, low
latency and power while enabling the proliferation of heterogeneous
designs and integrated packaging solutions.”
The UltraLink D2D PHY IP delivers up to 40Gbps wire speed in an
NRZ serial interface, providing up to 1Tbps/mm unidirectional
bandwidth. While some existing lower speed die-to-die solutions
require a silicon interposer to achieve the same bandwidth, the
UltraLink D2D PHY IP offers significant cost advantages by
supporting multi-chip modules on organic substrates. The IP extends
Cadence’s broad high-performance computing (HPC) IP portfolio in
support of the company’s Intelligent System Design™ strategy,
enabling SoC design excellence. For more information on the
UltraLink D2D PHY IP, which is available now for broad customer
engagements, please visit www.cadence.com/go/d2dtsmc.
About Cadence
Cadence is a pivotal leader in electronic design, building upon
more than 30 years of computational software expertise. The company
applies its underlying Intelligent System Design strategy to
deliver software, hardware and IP that turn design concepts into
reality. Cadence customers are the world’s most innovative
companies, delivering extraordinary electronic products from chips
to boards to systems for the most dynamic market applications
including consumer, hyperscale computing, 5G communications,
automotive, aerospace, industrial and healthcare. For six years in
a row, Fortune magazine has named Cadence one of the 100 Best
Companies to Work For. Learn more at cadence.com.
© 2020 Cadence Design Systems, Inc. All rights reserved
worldwide. Cadence, the Cadence logo and the other Cadence marks
found at www.cadence.com/go/trademarks are trademarks or registered
trademarks of Cadence Design Systems, Inc. All other trademarks are
the property of their respective owners.
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