JESD204B FPGA Debug Software Accelerates High-speed Design
12 October 2013 - 12:00AM
Business Wire
Free, on-chip, 2-D statistical eyescan software
enables fast in-system verification of high-speed data
converter-to-FPGA signal integrity.
Analog Devices, Inc. (NASDAQ: ADI), a global leader in
high-performance signal processing technology, released today an
FPGA-based reference design with software and HDL code that reduces
the design risk of high-speed systems incorporating
JESD204B-compatible converters. Called the JESD204B Xilinx
Transceiver Debug Tool, it supports the 312.5-Mbps to 12.5-Gbps
JESD204B data converter-to-FPGA serial data interface and Xilinx®
Inc., 7 series FPGAs and Zynq®-7000 All Programmable SoCs. It is
available at no cost with ADI converters and provides an on-chip,
2-D statistical eyescan that helps designers of radar arrays,
software-defined radio and other high-speed systems more quickly
verify the signal integrity of JESD204B data converter-to-FPGA
designs using gigabit transceivers.
- Download the reference design:
http://www.em.avnet.com/en-us/design/drc/Pages/Analog-Devices-Linux-JESD204B-Eyescan-Software.aspx
- View a video on JESD204B A/D
converters, FPGAs and eyescan diagrams:
http://videos.analog.com/video/products/analog-to-digital-converters/2534598195001/High-Speed-ADC-FMC-Development-Board-with-JESD204B/
- Learn more about Xilinx FPGAs:
www.xilinx.com/jesd204
“The Analog Devices JESD204B Xilinx Transceiver Debug Tool
provides on-chip eyescanning that augments the test and measurement
process by statistically determining signal integrity inside the
FPGA,” said Revathi Narayanan, High Speed I/O product manager,
Xilinx. “Where other techniques probe the outside of the FPGA
package and acquire the signal before it’s been processed by
Xilinx’s automatic gain control and equalizer blocks, ADI’s
approach yields a more accurate result by utilizing the Xilinx
transceiver on-chip eyescan feature to allow developers to monitor
the signal integrity and design margin on their JESD204B links
inside the FPGA.”
ADI’s reference design gathers data directly from the on-chip Rx
margin analysis feature in the 7 series IBERT core and manages the
data locally inside the FPGA or one of the ARM® dual-core
Cortex™-A9 MPCore™ processors, displaying the data on an HDMI
monitor or over Ethernet to a remote monitoring station. Typically,
other scanning tools measure signals off-chip and require costly
test and measurement equipment or transfer the data back over JTAG
to be viewed on a host/development PC in the lab.
‘Live’ Data Capture Monitors Equipment Health
Alternative scanning tools typically measure high-speed data
links by generating a pseudo-random bit stream (PRBS) that is
checked for bit-level correctness in a closed development
environment. This approach does not describe how well the design is
performing or if it might be on the verge of failure. ADI’s
reference design measures link robustness using actual JESD204B
serial data running to the FPGA. This use of “live” data enables
signal fidelity to be monitored even after the design has been
deployed in the field, which allows for real-time and predictive
maintenance over the life of the product.
Pricing and Availability
Product Availability
Price
JESD204B Xilinx Transceiver Debug Tool
NOW Free with ADI Converters
About Analog Devices
Innovation, performance, and excellence are the cultural pillars
on which Analog Devices has built one of the longest standing,
highest growth companies within the technology sector. Acknowledged
industry-wide as the world leader in data conversion and signal
conditioning technology, Analog Devices serves over 60,000
customers, representing virtually all types of electronic
equipment. Analog Devices is headquartered in Norwood,
Massachusetts, with design and manufacturing facilities throughout
the world. Analog Devices is included in the S&P 500 Index.
http://www.analog.com
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Analog Devices, Inc.Bob Olson,
781-937-1666bob.olson@analog.comorPorter
NovelliAndrew MacLellan,
617-897-8270andrew.maclellan@porternovelli.com
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