Thursday is Training Day Continues at the 55th Design Automation Conference
14 June 2018 - 1:30AM
Business Wire
Quality designer training in two tracks on
SystemVerilog, UVM, Python and Deep Learning
The Design Automation Conference (DAC), the premier conference
devoted to the design and automation of electronic circuits and
systems, is excited to once again host Thursday is Training
Day, a program that allows DAC attendees to attend quality
design sessions on popular subjects. The 55th DAC will be held at
Moscone West Center, San Francisco, California from June 24 - 28,
2018. Conference registration is now open, including sign-up for
“Thursday is Training Day.”
Thursday is Training Day offers DAC attendees the opportunity to
learn a variety of popular programming subjects from leading
training provider Doulos. All sessions are taught by respected
Doulos instructors who are subject-matter experts and who each have
years of experience of teaching engineers at all skill levels.
Attendees may choose sessions from two parallel tracks. Many
attendees will want to attend both the morning and afternoon
sessions from the same track, but it is also possible to
mix-and-match sessions from two different tracks or to attend just
a single half-day session.
In addition to the traditional Thursday is Training Day, Doulos
will host a lunch and learn tutorial on Python for Scientific
Computing and Deep Learning on Wednesday, June 27, at DAC.
Attendees to this tutorial will learn to start using Python as a
scripting language and become sufficiently familiar with Python to
start making sense of the emerging libraries and frameworks used
for deep learning, such as TensorFlow and Keras. This tutorial will
show attendees things they can do with Python right out-of-the-box!
Seating is limited and registration is requested. More information
and registration can be found at: lunch and learn.
2018 Thursday is Training Day Tracks:
- Track 1, Part I: How to Build
Verification Environments in SystemVerilogTime: 10:15 am – 1:15
pm
- Track 1, Part II: Learn UVM using the
Easier UVM Coding Guidelines and Code GeneratorTime: 2:15 pm – 5:15
pm
- Track 2, Part I: The Python Language:
Become a Pythoneer!Time: 10:15 am – 1:15 pm
- Track 2, Part II: Deep Learning for
Electronic EngineersTime: 2:15 pm – 5:15 pm
Session details, including summaries, presenter information and
room numbers, can be found at:
https://dac.com/content/thursday-training-day. Reserve a seat when
you register for DAC at www.dac.com.
About DAC
The Design Automation Conference (DAC) is recognized as the
premier event for the design of electronic circuits and systems,
and for electronic design automation (EDA) and silicon solutions. A
diverse worldwide community representing more than 1,000
organizations attends each year, represented by system designers
and architects, logic and circuit designers, validation engineers,
CAD managers, senior managers and executives to researchers and
academicians from leading universities. Close to 60 technical
sessions selected by a committee of electronic design experts offer
information on recent developments and trends, management practices
and new products, methodologies and technologies. A highlight of
DAC is its exhibition and suite area with approximately 200 of the
leading and emerging EDA, silicon, intellectual property (IP) and
design services providers. The conference is sponsored by the
Association for Computing Machinery’s Special Interest Group on
Design Automation (ACM SIGDA), the Electronic Systems Design
Alliance (ESDA), and the Institute of Electrical and Electronics
Engineer’s Council on Electronic Design Automation (IEEE CEDA).
Design Automation Conference acknowledges
trademarks or registered trademarks of other organizations for
their respective products and services.
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version on businesswire.com: https://www.businesswire.com/news/home/20180613005010/en/
Design Automation ConferenceMichelle Clancy,
1-303-530-4334Press@dac.com